From da04f9253c24ae5ed921f852c6dc15ca940599bb Mon Sep 17 00:00:00 2001 From: Martin Bilek Date: Fri, 15 Nov 2024 22:40:19 +0100 Subject: [PATCH] Add lor instruction --- assembler.h | 2 +- common.h | 2 +- opcodes.c | 11 ++++++++++- 3 files changed, 12 insertions(+), 3 deletions(-) diff --git a/assembler.h b/assembler.h index 0361831..569aa9e 100644 --- a/assembler.h +++ b/assembler.h @@ -1,3 +1,3 @@ #include "common.h" -char opcodes_strings[N_INSTRUCTIONS][4] = {"nop", "inc", "dec", "lod", "ldl", "sav", "swp", "jmp", "jez", "hlt", "pts", "pfs", "dpx"}; +char opcodes_strings[N_INSTRUCTIONS][4] = {"nop", "inc", "dec", "lod", "ldl", "sav", "swp", "jmp", "jez", "hlt", "pts", "pfs", "dpx", "lor"}; diff --git a/common.h b/common.h index a0a432d..6e8d295 100644 --- a/common.h +++ b/common.h @@ -1 +1 @@ -#define N_INSTRUCTIONS 13 +#define N_INSTRUCTIONS 14 diff --git a/opcodes.c b/opcodes.c index 5907823..42211a9 100644 --- a/opcodes.c +++ b/opcodes.c @@ -27,6 +27,8 @@ * rex, 2 byte length - instruction + dest register - read from external(stdin) - blocks execution until 2 bytes are read * * dpx, 4 byte length - instruction + register with pixel location + register with R and G + register with B and A(R and B are first 8 bits, G and A are second 8 bits) + * + * lor, 3 byte length - instruction + dest register + register containing address where to load from * * all instructions are padded to 4 bytes */ @@ -178,4 +180,11 @@ void dpx(uint8_t pixel_num_reg, uint8_t red_green_reg, uint8_t blue_alpha_reg) return; } -void (*opcodes[N_INSTRUCTIONS]) (uint8_t, uint8_t, uint8_t) = {nop, inc, dec, lod, ldl, sav, swp, jmp, jez, hlt, pts, pfs, dpx}; +void lor(uint8_t dest_reg, uint8_t unused_1, uint8_t mem_addr_reg) +{ + regs[dest_reg] = mem[regs[mem_addr_reg]]; + current_instruction += 2; + return; +} + +void (*opcodes[N_INSTRUCTIONS]) (uint8_t, uint8_t, uint8_t) = {nop, inc, dec, lod, ldl, sav, swp, jmp, jez, hlt, pts, pfs, dpx, lor}; -- 2.25.1